Webinar: 10-Minute GDSII Tapeout Quotes

Join eSilicon and SemiWiki for a webinar demonstrating eSilicon's new automated GDSII quoting tool.
July 31, 2014, 8:00 AM PDT.
GDSII online quoting tool webinar >>>

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Instant MPW Quotes: New Die Packaging Services

Request a free account and explore your multi-project wafer (MPW) production options with no obligation. Our newest MPW quoting tool includes standard IC package options.
MPW shuttle service details>>>

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IP Catalog

Our complete portfolio of customizable semiconductor IP and I/Os is available at ChipEstimate.com.

White Paper

The Challenges of Creating a Successful Back-End Manufacturing Operations Flow

It is becoming very clear that outsourcing of the back-end manufacturing operations part of the IC development flow is economically beneficial to fabless semiconductor companies of all sizes. By outsourcing post-GDSII operations, fabless companies can concentrate on their core competency, which is chip design, by reallocating their costs from non-core competency skills to differentiating skills. The goal of this White Paper is to paint a realistic picture of the complexities of manufacturing operations in the era of deep sub-micron CMOS, and dispel certain simplistic notions about the back-end manufacturing flow. [View more white papers]

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Please contact us to schedule a demo of eSilicon Access production management tracking software.

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How We Deliver First-Time-Right ASICS

Infrastructure & Processes

Our eSilicon Enterprise™ infrastructure integrates your core competencies with our design, productization and manufacturing services and the global semiconductor value chain. The eSilicon® Enterprise infrastructure includes our patented eSilicon Access® production management tracking solution with automated schedule impact analysis.

Partners

eSilicon partners with key suppliers in the areas of semiconductor intellectual property and manufacturing, including foundries, packaging and test houses. These partnerships enable a seamless flow from concept to ASIC production.

First-Time-Right ASICs: Infrastructure, Processes and Partners

At eSilicon, we excel in consistently providing first-time-right silicon to our customers. This is no small task. We are able to achieve this for a variety of reasons.

Our intelligent infrastructure is the backbone that provides the essential ingredients for our success. It spans all aspects of chip design — foundry technology characteristics, IP models, package information, test platforms, and quality and reliability data. We work with tier-one partners in each of these areas, distil the raw information they provide us, and maintain an intelligent database that enables us to make quick decisions and evaluate tradeoffs objectively.

This intelligent infrastructure system is coupled to our unique design methodology, where we address design elements — from RTL to GDSII, package design, test program development, and quality and reliability assessment — using a combination of commercial tools and proprietary eSilicon tools. Our rigorous methodology provides well-defined handoffs between each step in the process for a smooth transition from design to manufacturing.

Finally, our connection to manufacturing data — the eSilicon Access® production management system— provides us the continuous feedback and learning mechanism that allows us to monitor our process and meet specific customer requirements.

Our track record speaks for itself. With over 275 tapeouts since eSilicon’s inception, our first-time-success rate is greater than 99 percent.