Vote for Jack Harding, GSA VCP Board Seat

The GSA 2012 board elections opened on January 11, 2012. Jack Harding, president and CEO of eSilicon Corporation, is seeking a third term on the GSA board in the value chain producer (VCP) seat.

Your vote for Jack Harding is a vote for proven results. It is also a vote that ensures that the voice of every member of the GSA ecosystem — large or small — is heard and understood at the GSA board level. Click here to learn more about Mr. Harding's candidacy.

If you're the GSA voting member for your company, please cast your vote for Jack Harding today by following the instructions provided in your election ballot. Click here to go to the GSA website now.

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Package Matters, by Javier DeLaCruz, eSilicon's manufacturing technology director, covers hot topics in semiconductor packaging such as 3D-IC and 2.5D-IC packaging technology, thru-silicon-vias (TSVs), the relative cost of multi-chip modules (MCMs), and considerations for choosing the lowest-cost package for your ASIC. [Read More]

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Home WHAT ASIC Design Services

ASIC Design Services

ASIC design involves the complex interaction of foundry process technology, IP design and integration, EDA tools and design methodologies, physical design, design for test, package design and product engineering. We focus on optimizing for the combination of power, performance, and area (PPA) appropriate for your device's specific targets.

  • We have access to the leading foundry process technologies all the way down to 28nm through our partnerships with the world's leading-edge foundries, including TSMC and GLOBALFOUNDRIES.
  • In addition to our vast third-party IP portfolio — including IP from ARM, MIPS, Avago and Synopsys — we provide custom logic, memory, analog and I/O solutions to meet your specific needs, be they targeted for high performance or low power.
  • Our unique PPA-optimal eSiFlow™ design methodology is targeted to provide the best power, performance and area for your ASIC.

Concurrent Design for First-Time-Right ASICs

Close collaboration between our design, test, package, and process engineering teams results in a smooth transition of our designs to manufacture so that your design is testable and manufacturable with high yield. Our extensive experience with this holistic approach to ASIC design has yielded a proven track record of first-time-right designs and provides you with a quality ASIC solution and low total cost of ownership.

eSilicon® ASIC Design Ecosystem