TCAM Application Note: Streamline Multi-Byte Searches With TCAM Arrays

Embedded content addressable memories (CAMs) allow system designers to define various configurations to match architectural requirements to achieve the optimal performance, power and cost of the system.

This application note describes a simple way to customize eSilicon’s eFlexCAM™ memories into a register-array CAM that supports parallel compare and write operations and multiple byte-match lines, typically used in network security applications.

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White Paper

High-Performance Classification Using Embedded Ternary Content Addressable Memory (TCAM)

With port speeds exceeding 100Gbps, route lookups that are a fundamental application to all routers have relied on ternary content addressable memories (TCAM) to provide a lookup response within a clock cycle. However, these devices in “discrete form” suffer from limitations in terms of power, cost and real estate and to some extent lack the required flexibility. Embedding a TCAM block along with the rest of the system in a single device should overcome these disadvantages. This paper provides an overview of advantages of embedded TCAMs and describes a few applications that could take advantage of embedded TCAM technology. [View more white papers]

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IP Catalog

Our complete portfolio of customizable semiconductor IP and I/Os is available at ChipEstimate.com.

Custom Embedded IP Brochures

eFlexCAM™ Custom Embedded
CAM Compilers

Binary and Ternary CAM (BCAM and TCAM) compilers in 28nm-180nm.

eFlex™ Custom Embedded
Memory IP

SRAM, ROM, MPRF, CAM, and cache custom memories.

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High-Speed Single-Port Cache Memories

eSilicon has designed custom high-speed single-port cache memories that are optimized to meet the high-performance requirements of industry-standard processor cores.

High Performance for the Low-Power Market

The performance of smart phones, handheld devices, digital TVs and other power-sensitive devices is often limited by the performance at which the processor cores can run. At the same time, the performance of processor cores is often limited by the performance of memory instances used in the L1 cache of the processor core. eSilicon has delivered fast-cache memories to customers in the low-power process segment at advanced nodes down to 28nm. These cache memories deliver one of the highest levels of performance in the low-power market segment.

eSilicon's philosophy for developing cache memories is to first meet the end customer's performance requirements. Then we map the circuitry to the customer's other key metrics, such as low leakage or small area. This philosophy has helped us consistently deliver fast-cache memories that meet customer requirements.

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