Details    Video


Details    Video

Webinar Video:
10-Minute GDSII
Tapeout Quotes

Replay of a live eSilicon webinar moderated by Dan Nenni (SemiWiki founder) where we demonstrate our GDSII quoting portal.  Working with a real customer, we generate a complete, executable quotation for a production GDSII tapeout at TSMC in about 10 minutes.  We also explore "what if" scenarios to optimize unit price for the program. Created: July 31, 2014, 8:00 AM PDT.


TCAM Application Note: Streamline Multi-Byte Searches With TCAM Arrays

Embedded content addressable memories (CAMs) allow system designers to define various configurations to match architectural requirements to achieve the optimal performance, power and cost of the system.

This application note describes a simple way to customize eSilicon’s eFlexCAM™ memories into a register-array CAM that supports parallel compare and write operations and multiple byte-match lines, typically used in network security applications.

Request a copy of this application note by email.


Instant MPW Quotes: New Die Packaging Services

Request a free account and explore your multi-project wafer (MPW) production options with no obligation. Our newest MPW quoting tool includes standard IC package options.
MPW shuttle service details>>>

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See Our Complete
IP Catalog

Our complete portfolio of customizable semiconductor IP and I/Os is available at ChipEstimate.com.

Subscribe to Package Matters blog

Package Matters, by Javier DeLaCruz, eSilicon's manufacturing technology director, covers hot topics in semiconductor packaging such as 3D-IC and 2.5D-IC packaging technology, thru-silicon-vias (TSVs), the relative cost of multi-chip modules (MCMs), and considerations for choosing the lowest-cost package for your ASIC. [Read More]


Broad Packaging Expertise

Packaging expertise at eSilicon covers many disciplines. We take a holistic approach to package selection, identifying the solutions best suited for a given application. The considerations made at the very beginning of a project include the following:

  • Signal count/type
  • Signal integrity
    • Power delivery
    • Isolation/crosstalk
    • Signal transition
    • Electromagnetic interface (EMI)
  • PCB routing options
  • Space requirements
  • Cost considerations
  • Thermal considerations
  • Volume vs. assembly source
  • Reliability considerations

Various FBGA Configurations

ASIC packages

Signal Integrity Team

Our signal integrity team is not as an afterthought of the design process. Instead, signal integrity at the die, package and system levels is considered up front. Our team is a scalable extension of your own and we can either complement your own capabilities or add capabilities in complex electrical performance modeling. Rules of thumb may be a good starting point, but we do not rely on these to determine the outcome. Before a part is ever constructed, we can work with you to determine what services make the most sense for a given application and what needs to be done to overcome any performance concerns you may have. 

Our team can help indentify the right approach and provide the Touchstone or Wideband SPICE models you may need for your own system work or downstream customer requirements. We can also perform simulation work at the system level for your application bring-up board including a socket, connectors, external components and the device under test.

 3D Model: Die, Package, Socket and PCB

3D Model: Die, Package, Socket and PCB