New post on Platform Pages: Tales of IP Innovation
Flexible Network-Optimized 7nm IP Platform
Deep Learning Webinar Video: Custom Chips for AI
Media Coverage
Cloud Drives Changes In Network Chip Architectures
New data flow, higher switch density and IP integration create issues across the design flow. By Ann Steffora Mutschler Semiconductor Engineering
Avatar Integrated Systems Introduces the Industry’s First Detailed-Route-Centric Physical Implementation Solution for Advanced Nodes Through 7nm Processes
"eSilicon has used Aprisa on several very large and complex FinFET chips across several process nodes, including 16nm and 14nm. We expect to apply the new release to our advanced 7nm work as well." Sid Allman, eSilicon Avatar Integrated Systems
Blog Review: Oct. 3
AI and the design ecosystem; new approach to 56G SerDes; handling counters in formal; changes for OSATs. By Jesse Allen Semiconductor Engineering
Recent News
eSilicon Announces Availability of neuASIC IP Platform for AI ASIC Design
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