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Designers: Take Control of Your Chip

By Mike Gianfagna on September 21, 2016 from

This is a familiar story for us – maybe it is for you, too. eSilicon engages with many companies on high-complexity ASICs. From time to time, a customer contacts us and says they have a design in mind, but they just can’t fit in the package, or meet the power budget, or meet timing. Fifty ... continue reading

John Lennon: Power to the People

Power to the People (right on…)

By Mike Gianfagna on June 30, 2016 from

If you’re the right age (or older), you will immediately think of John Lennon when you read the title of this piece.  The song was released in 1971, so I will cut many of you some slack on that. The title was inspired by several pieces of research that I was fortunate enough to be exposed to ... continue reading

Free memory IP and I/Os for university research

Research Reimagined – Introducing eMUSe

By Mike Gianfagna on June 14, 2016 from

Who is eSilicon? Multi-project wafer (MPW) use for semiconductor research has been steadily rising over the past decade. With that, there have been some growing pains. Predictable technology access, cost, cycle time, decoding process options and access to IP are just a few of the challenges faced ... continue reading