7nm TCAM Silicon Testing Exceeds Expectations

By Kar Yee Tang & Dennis Dudeck on 10/10/2018

eSilicon’s mission is to enable our partners with high-quality, reliable, silicon-proven IP. Our first 7nm ternary CAM (TCAM) test chip taped out in August 2017 and our silicon testing was completed mid-2018.

eSilicon 7nm Ternary CAM Test Chips image
Figure 1: eSilicon 7nm Ternary CAM Test Chips

The TCAM compiler is a vital component in our 7nm FinFET IP Platform for our ASIC customers. The test chip was brought up smoothly (no smoke detectors were triggered) and the silicon results align with the characterization data. A full suite of ATE tests were developed and performed for multiple TCAM configurations and on-chip cycle time, access, setup, hold time, and power measurements correlated. The TCAM is fully functional when operated within 0.8x – 1.3x Vnom. Full memory SCAN and retention test covering down to 0.55V passed.

eSilicon 7nm Ternary CAM Test Chip in Test Socket image
Figure 2: eSilicon 7nm Ternary CAM Test Chip in Test Socket

The 7nm IP platform is eSilicon’s second-generation platform, with architectural enhancements from our silicon-proven platform in previous FinFET technologies. eSilicon has been providing TCAM and binary CAM (BCAM) to networking customers for over 15 years, in geometries from 14nm to 180nm, now 7nm.

The TCAM was specifically architected to meet the high-speed and high-bandwidth requirements of ASICs and ASSPs targeted for networking and data center applications. We’re happy to see performance is >2GHz in the silicon test chip, and this also correlates with foundry wafer acceptance test (WAT) data.

TCAMs, due to their parallel search architecture, consume high power so circuitry was hand crafted to reduce power. As well, a compile-time power-reduction feature was added, and a patented duo architecture is available for further reducing area and power. Silicon shows low power consumption as expected.

This test chip validates a custom TCAM designed for a specific application. A second 7nm test chip was taped out in December 2017 to validate the full suite of TCAM and SRAM compilers of our 7nm IP Platform. We got silicon back a couple of months ago and initial testing looks good.

Stay tuned for more updates as we plow through testing in the coming weeks.

To learn more, contact your eSilicon sales representative and visit eSilicon’s Ternary CAM IP or 7nm networking IP platform web pages.