eSilicon DSP SerDes demo at ISSCC 2019

A Conference for the Ages

By Mike Gianfagna on February 28, 2019 from

The International Solid-State Circuits Conference (ISSCC) was held recently in its permanent location at the San Francisco Marriott Marquis. eSilicon had the honor of both presenting our SerDes capabilities and demonstrating the technology as well. More about that later. First, I’d like to ... continue reading

eSilicon/Wild River Technology 56G SerDes evaluation board

High-Speed Communication Takes a Village

By Mike Gianfagna on January 31, 2019 from

Supply chain, partner network, ecosystem. There are a lot of ways to describe the collection of companies needed to get something done. We’ve all discussed the extensive ecosystem needed to get an advanced chip designed and built. Without a doubt, that is a formidable problem addressed by a ... continue reading

SC18 exhibitors

Supercomputers Are for Everyone

By Mike Gianfagna on November 29, 2018 from

Our SerDes world tour continues. This past month, we demonstrated our 7nm 56G long-reach SerDes in Dallas and Israel. In Dallas, our demonstration included error-free operation in 56G PAM4 over a 30dB channel without forward error correction through an eye-popping five-meter cable. Many thanks to ... continue reading

5m Prototype Samtec EBCM Series ExaMAX® Backplane Cable Assembly

High-Speed Serial Comms, Getting There is Half the Fun

By Mike Gianfagna on October 25, 2018 from

Last month I wrote about our 56G SerDes announcement – silicon validated and running in Rome at a major show. We had a great time at that show and got a lot of compliments about the quality and flexibility of our SerDes.  These kind of unfiltered, unsolicited customer comments are really what ... continue reading