Thru-Silicon Vias, Current State of the Technology
By Sally Slemons on January 30, 2011 from
Ready for primetime in ASICs...almost
Thru-silicon-vias (TSVs) have become a very hot topic in in recent months. Ever since Xilinx reported that they are using a 2.5D ... continue reading
Should You Be Leadfree? Maybe Not!
By Sally Slemons on August 14, 2010 from
The European Union (EU) has certainly led the charge in the elimination of many hazardous chemical for semiconductor devices with the RoHS legislation (Reduction of Hazardous Substances.) Most of these were not present in the first place or were more easily eliminated or substituted with ... continue reading
Misuse of Thermal Numbers
By Sally Slemons on June 21, 2010 from
So many of us in the semiconductors realm are guilty of using JEDEC thermal data incorrectly. I often get questions such as"how much power can this package handle" or "what's the thermal efficiency of this package." Unfortunately, in almost all situations these questions cannot be generally ... continue reading
Going MCM? Do it Backwards!
By Sally Slemons on April 01, 2010 from
As packages evolve into the 3D space or other formats of SiP (System-in-Package) integration, one thing is clear. The integration has to be planned first. This integration has to be considered from the system-level and die floorplan concurrently. I often see prospective clients with SiP ... continue reading