Press Release

DesignCon 2019: eSilicon to demonstrate 7nm 56G DSP SerDes over 5-meter Samtec cable assembly

For release on January 23, 2019.

eSilicon, a leading provider of FinFET-class ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, will team up with Samtec to demonstrate eSilicon’s 7nm 56G full-DSP SerDes over Samtec’s 5m ExaMAX® Backplane Cable Assembly.

eSilicon will also participate in Test Fixture Signal Integrity for 112G PAM-4: Lively Panel Discussion on the Top Design Rules.

SerDes Demonstrations: Samtec Booth 737
Wednesday-Thursday
January 30-31, 2019

Using Samtec ExaMAX Backplane Connector paddle cards and a 5m ExaMAX Backplane Cable Assembly, eSilicon will demonstrate the performance, flexibility and extremely low power consumption of its 7nm, 56G PAM4 and NRZ DSP-based long-reach SerDes.

Forward error correction (FEC)-free operation will be showcased across multiple channels, operation frequencies and modulation schemes, thanks to a very powerful and programmable real-time DSP-based equalization capability. Bit-error rate, eye diagram monitors and pulse response processing will be shown among many other capabilities.

Panel Discussion:
Test Fixture Signal Integrity for 112G PAM-4: Lively Panel Discussion on the Top Design Rules
Wednesday, January 30
10:00-10:45 AM

Panelists: Tim Horel, eSilicon; Scott McMorrow, Samtec; Al Neves, Wild River; Heidi Barnes, Keysight; Jason Ellison, Amphenol.

About DesignCon
January 29-31, 2019
Santa Clara convention Center
Santa Clara, Calif.

As the nation’s largest event for chip, board, and systems designers, DesignCon is a must-attend opportunity to share ideas, overcome challenges, and source solutions.

About eSilicon
eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets. www.esilicon.com

Collaborate. Differentiate. Win.™

eSilicon is a registered trademark, and the eSilicon logo, neuASIC and “Collaborate. Differentiate. Win.” are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.

Sally Slemons
eSilicon Corporation
408.635.6409
sslemons@esilicon.com

Nanette Collins
Public Relations for eSilicon
617-437-1822
nanette@nvc.com