eSilicon to present at State of AI and ML – Spring 2019
For release on April 2, 2019, San Jose, Calif.
eSilicon, a leading provider of FinFET-class ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, is giving a presentation on ASIC and deep learning at the State of AI and ML-Spring 2019 conference, to be held in Santa Clara, CA
Dr. Carlos Macian, Sr. Director AI Strategy and Products at eSilicon
An ASIC Approach to Unlock Deep Learning Innovation
AI/deep learning algorithms demand superior performance. While FPGAs, GPUs and other forms of dedicated processor help, a custom chip always provides the ultimate in performance with the lowest power and area. The challenge is mapping advanced and rapidly evolving algorithms to an ASIC in a predictable and cost-effective manner. eSilicon will present a unique approach to address this challenge.
Thursday, April 4
3:30 PM Talk 3
eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets. www.esilicon.com
Collaborate. Differentiate. Win.™
eSilicon is a registered trademark, and the eSilicon logo, neuASIC and “Collaborate. Differentiate. Win.” are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.
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