An ASIC Low-Power Primer, by eSilicon engineers Dr. J. Bhasker, architect, and Dr. Rakesh Chadha, director of design technology, provides invaluable training on design techniques for low-power digital semiconductor devices.
“System power management is a critical aspect of IC design — everyone cares about low-power design in order to be green; it is no longer the domain of mobile applications. Power management spans technology, standard cell library and memory selection, IP design, RTL design and physical implementation,” said Dr. Prasad Subramaniam, eSilicon’s vice president of design technology. “This book covers all these topics. And it would be difficult to find a better source than eSilicon and Rakesh and Bhasker who have extensive experience with power management and low-power IC design over multiple generations of technologies.”
The authors guide readers through architectural and implementation techniques, system power consumption analysis, low-power design techniques and more. The duo also wrote Static Timing Analysis for Nanometer Designs: A Practical Approach (see below).
A System Verilog Primer, by Jayaram Bhasker, is a practical and concise guide for designing RTL synthesizable models in Verilog providing readers with the knowledge to begin writing synthesizable Verilog models quickly and with confidence.
Jayaram Bhasker is a distinguished author and expert in the area of hardware description languages and RTL synthesis. He is an architect at eSilicon Corporation.
To order A System Verilog Primer or to read reviews go to Amazon.
Other books by Jayaram Bhasker are also available on Amazon.
Static Timing Analysis for Nanometer Designs: A Practical Approach, co-authored by Jayaram Bhasker and Rakesh Chadha, is written for professionals working in the area of chip design and timing verification of ASICs. The book covers topics such as cell timing and power modeling; interconnect modeling, delay calculation, crosstalk and other relevant issues.
Jayaram Bhasker is an architect at eSilicon Corporation. Rakesh Chadha is the director of design technology at eSilicon Corporation.
To order Static Timing Analysis for Nanometer Designs: A Practical Approach, or to read reviews, go to Amazon.
Other books by Rakesh Chadha are also available on Amazon.
Computer-aided Design of Microwave Circuits, Rakesh Chadha with K.C. Gupta and Ramesh Garg, Artech House Publishers, 1981, ISBN 0-89006-106-8. (Also published in Chinese and Russian)
Rakesh Chadha is the director of design technology at eSilicon Corporation.
To order Computer-aided Design of Microwave Circuits, or to read reviews, go to Amazon.