High-Speed Serial Comms, Getting There is Half the Fun
By Mike Gianfagna on October 25, 2018 from
Last month I wrote about our 56G SerDes announcement – silicon validated and running in Rome at a major show. We had a great time at that show and got a lot of compliments about the quality and flexibility of our SerDes. These kind of unfiltered, unsolicited customer comments are really what ... continue reading
7nm TCAM Silicon Testing Exceeds Expectations
eSilicon’s mission is to enable our partners with high-quality, reliable, silicon-proven IP. Our first 7nm ternary CAM (TCAM) test chip taped out in August 2017 and our silicon testing was completed mid-2018.
Figure 1: eSilicon 7nm ... continue reading
56G 7nm SerDes: Eye-Witness Account
By Mike Gianfagna on September 27, 2018 from
High-performance SerDes represents critical enabling technology for advanced ASICs. This star IP block finds application in many networking and switching designs as well as other high-performance applications. So, when a new high-performance SerDes block hits the streets, it’s real news. eSilicon ... continue reading
Our 56Gbps PAM4 SerDes IP Hits the Lab
At eSilicon we’ve been talking about adding a 56G PAM4 SerDes to our N7 ASIC IP platform now for some time. I’m happy to say our 7nm FinFET 30 Gbaud/s PMA test chip silicon is now in the lab and we have lots of good news to share!
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