DDR I/O

DDR I/O Library

eSilicon has developed a DDR I/O library catering to a wide variety of customers and market segments. Our DDR I/O library includes support for multiple voltages and a full set of support cells (supply, corner spacers, diode breakers, terminators) targeted for a wide range of process technologies and applications. eSilicon’s DDR I/O solution is carefully crafted to meet critical power, performance, area (PPA) and reliability requirements for standards including DDR4, DDR3, DDR3L, DDR2, LPDDR2, and LPDDR3.

DDR I/O Features

  • DDR4 1.2V up to 3200 Mbps
  • DDR3 1.5V up to 2133 Mbps
  • DDR3L 1.35V up to 1600Mbps
  • DDR2 1.8V up 1066 Mbps
  • LPDDR2 1.2V up to 800 Mbps calibrated output impedance and termination impedance
  • Selectable drive strengths
  • On-die termination values for DQ/DQS input buffers during a “read” from SDRAM
  • Receiver and driver power-down modes
  • Circuit under pad (CUP)
  • Built-in boundary scan

Please contact us at ipbu@esilicon.com for technical documentation or if you would like to learn more about our custom memory and I/O offering.

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