An ASIC Low-Power Primer, by eSilicon engineers Dr. J. Bhasker, architect, and Dr. Rakesh Chadha, director of design technology, provides invaluable training on design techniques for low-power digital semiconductor devices.
"System power management is a critical aspect of IC design — everyone cares about low-power design in order to be green; it is no longer the domain of mobile applications. Power management spans technology, standard cell library and memory selection, IP design, RTL design and physical implementation," said Dr. Prasad Subramaniam, eSilicon's vice president of design technology. "This book covers all these topics. And it would be difficult to find a better source than eSilicon and Rakesh and Bhasker who have extensive experience with power management and low-power IC design over multiple generations of technologies."
The authors guide readers through architectural and implementation techniques, system power consumption analysis, low-power design techniques and more. The duo also wrote Static Timing Analysis for Nanometer Designs: A Practical Approach (see below).
An ASIC Low-Power Primer is now available from Springer, a leading publisher of science and technology reference books, as well as Amazon.
Other books by Jayaram Bhasker and by Rakesh Chadha are also available on Amazon.