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Home Resources eSilicon Technical Publications

Published Books

A System Verilog Primer

A System Verilog Primer, by Jayaram Bhasker

A System Verilog Primer, by Jayaram Bhasker, is a practical and concise guide for designing RTL synthesizable models in Verilog providing readers with the knowledge to begin writing synthesizable Verilog models quickly and with confidence.

Jayaram Bhasker is a distinguished author and expert in the area of hardware description languages and RTL synthesis.

To order A System Verilog Primer or to read reviews go to Amazon

Static Timing Analysis for Nanometer Designs: A Practical Approach

Static Timing Analysis for Nanometer Designs: A Practical Approach

Static Timing Analysis for Nanometer Designs: A Practical Approach, co-authored by Jayaram Bhasker and Rakesh Chadha, is written for professionals working in the area of chip design, timing verification of ASICs. The book covers topics such as cell timing and power modeling; interconnect modeling, delay calculation, crosstalk and other relevant issues.

Rakesh Chadha is the director of design technology at eSilicon Corporation.

To order Static Timing Analysis for Nanometer Designs: A Practical Approach, or to read reviews, go to Amazon

Other books by Rakesh Chadha:

Computer-aided Design of Microwave Circuits

Computer-aided Design of Microwave Circuits Computer-aided Design of Microwave Circuits, Rakesh Chadha with K.C. Gupta and Ramesh Garg, Artech House Publishers, 1981, ISBN 0-89006-106-8. (Also published in Chinese and Russian)

Other books by Jayaram Bhasker:

The Exchange Format Handbook: A DEF, LEF, PDEF, SDF, SPEF & VCD Primer

The Exchange Format Handbook: A DEF, LEF, PDEF, SDF, SPEF & VCD Primer

The Exchange Format Handbook: A DEF, LEF, PDEF, SDF, SPEF & VCD Primer, Jayaram Bhasker, Star Galaxy Publishing, Allentown, PA, 2006, ISBN 0-9650391-3-7
(Also published in Chinese)

A SystemC Primer

A SystemC Primer

A SystemC Primer, Jayaram Bhasker, Second Edition, Star Galaxy Publishing, Allentown, PA, 2004, ISBN 0-9650391-2-9 (First edition, 2002, ISBN 0-9650391-8-8) (Published in Chinese)

A VHDL Primer

A VHDL Primer

A VHDL Primer, Third Edition ,Jayaram Bhasker, Prentice Hall, Englewood Cliffs, NJ, 1999, ISBN 0-13-096575-8 (Second edition, 1995, ISBN 0-13-181447-8; First edition, 1992, ISBN 0-13-952987-X) (Also published in Japanese)

Verilog HDL Synthesis, A Practical Primer

Verilog HDL Synthesis, A Practical Primer

Verilog HDL Synthesis, A Practical Primer, Jayaram Bhasker, Star Galaxy Publishing, Allentown, PA, 1998, ISBN 0-9650391-5-3 (Indian edition, BS Publications, 2001, ISBN 81-7800-011-3).

A Guide to VHDL Syntax

A Guide to VHDL Syntax

A Guide to VHDL Syntax, Jayaram Bhasker, Prentice Hall, Englewood Cliffs, NJ, 1995, ISBN 0-13-324351-6.
(Also published in German) VHDL Features and Applications: Study Guide, IEEE, 1995, Order No. HL5712.