The future of ASICS in AI/deep learning, networking, high-performance computing and 5G

What’s Next?

By Mike Gianfagna on December 21, 2017 from

We just concluded two very successful seminars in Tokyo and Shanghai. Samsung Memory presented their HBM2 solutions, Samsung Foundry talked about their advanced 14nm FinFET solutions, ASE Group reviewed their advanced 2.5D packaging solutions, eSilicon presented our ASIC and 2.5D ... continue reading

ASIC ecosystem analogy

Advanced ASICs – It Takes an Ecosystem

By Mike Gianfagna on November 26, 2017 from

I remember the days of the IDM (integrated device manufacturer). For me, it was RCA, where I worked for 15 years as the company changed from RCA to GE and then ultimately to Harris Semiconductor. It’s a bit of a cliché, but life was simpler then, from a customer point of view at least. RCA did ... continue reading

eSilicon FAST academy logo

Talking the Talk on Training

By Mike Gianfagna on September 28, 2017 from

In my prior post, I discussed the value of good design flow training. A properly executed program can turn average engineers into above average problem solvers with the right tools and techniques. We got to thinking about this opportunity quite seriously at eSilicon. Is there a way to develop a ... continue reading

FinFET ASIC design flow training image

Training as a Strategic Weapon

By Mike Gianfagna on August 24, 2017 from

In my last post, I discussed the topic of applying machine learning to the design of machine learning chips.  I pointed out that one can achieve significant improvements in schedule predictability, PPA compliance and an overall reduction in program risk if machine learning is applied to the right ... continue reading