Paid Semiconductor Engineering Internships in Pavia, Italy

Enroll in eSilicon FAST Academy in Pavia, Italy
Salary and benefits provided while eSilicon trains/mentors students and graduates in FinFET semiconductor skills

FAST Academy: Paid Semiconductor Engineering Internships for Italian Students and Graduates

FAST Academy is a paid semiconductor engineering internship/training program in the most advanced silicon technologies today, plus the opportunity to start a career at eSilicon at the end of the period. FAST Academy takes place in Pavia, Italy.

What is eSilicon Looking for?

Talented, passionate, self-motivated high school and university students and graduates who want to start a technical career in FinFET* semiconductors.

eSilicon Expertise

We create products that will shape tomorrow’s cloud, AI & 5G infrastructure markets by designing application-specific integrated circuits (ASICs**) for our customers.

Why FAST Academy?

  • eSilicon is expanding its teams and expertise in FinFET technologies
  • We want to share the analog skills and expertise concentrated in the Pavia team with young talent and build stronger and more scalable teams

University Activities

eSilicon Italy has a strong relationship with many universities in Italy. Here is a sample of our ongoing activities:

  • Universita’ di Pavia: We are participating in the Laurea Magistrale+ (LM+) program: Inside this university program, we will have one student for a one-year internship. Job descriptions are below
  • Politecnico di Milano: We are participating in the Roadmap to Electronics Jobs program:
  • Universita’ di Bologna: Currently one student is in eSilicon Pavia working on his MS thesis project in the analog design field
  • Scuola Universitaria Superiore Sant’Anna, Pisa: We have made presentations about eSilicon and technical presentations regarding ongoing design activities

Job Descriptions

Analog Layout Engineer
As a junior analog layout design engineer you will work with our team of analog designers and layout designers to develop state-of-the art high-speed SerDes IP for use in our ASICs. Key accountabilities include designing and developing layouts for complex analog blocks such as high-frequency oscillators (VCO), phase-locked loops (PLLs), analog-to-digital and digital-to-analog converters (ADCs, DACs) and operational amplifiers (OpAmps). In your role you will be using the most advanced FinFET technology.

Training Program Phases
FAST Academy — Path to a Career at eSilicon

Program phase Focus
Introduction General overview of FinFET ASIC design – all focus areas will be described:

  • Basics of electronic design
  • CMOS planar technology
  • FinFET technology
  • Schematic and layout tools
Deep training
  • Layout XL (Cadence)
  • Verification flow (Mentor)
  • Layout trials on simple blocks under full supervision of expert engineer
Hands-on project
  • Basic circuit topologies (mirrors, differential pairs, etc.)
  • Hands-on real blocks
  • Effect of layout parasitics, LDE, LLE
  • Focus on high-speed blocks
  • EMIR flow
  • Filler flow

Laurea Magistrale+ Internship Activity Descriptions

Analog Design Engineering Internship
Design and mixed-mode circuit simulation activity on building blocks for high-speed serial interface for data center applications. The candidate will work closely with the system architects and analog and digital designers to simulate and verify the functionality and the performance of top-level blocks of a high-speed serial interface (SerDes).

The candidate will be exposed to state-of-the-art high-speed serial interface design and will help to validate the circuit functionality and benchmark it against the model to help verifying that the schematic design meets the electrical specifications defined by the system architects. The circuits that the candidate will deal with include: continuous time linear equalizers, multi-GHz VCO, fractional PLL, ADC, DAC, band gap, voltage/current reference and temperature sensors.

Application Engineering Internship
Measurement and validation activities done in the lab on silicon devices for high-speed serial interface for data center applications. The candidate will work closely with the system architects, analog and digital designers and firmware and hardware engineers to test the functionality and the performance of top-level blocks of a high-speed serial interface (SerDes).

The candidate will be exposed to state-of-the-art high-speed serial interface design and will help to test the circuit functionality and performance as well as automate compliance tests specific to the standard. The candidate will use specific instrumentation and will design software to build virtual instruments that control the device under test.

What’s in it for You?

  • Accelerated, intensive ramp-up in leading-edge chip design with both fundamental technical training and practical experience
  • Hands-on opportunities with the most complex designs and latest tools in the industry
  • Work with and learn from top engineering and business experts

How to Apply

This program is open to students and graduates in Italy.

  1. APPLICATION FORM — Complete the online application
  2. INTERVIEW — Based on application information qualified applicants will be invited to technical and non-technical interviews at the eSilicon office in Pavia, located in the Viale della Repubblica, 38
  3. DECISION — based on overall assessments in the areas of application and interview results you will receive an offer and invitation to participate in eSilicon’s FAST Academy

Further Information and Contacts:

About eSilicon Corporation:

  • Founded in 2000: history of innovation in chip design and advanced automation
  • Headquartered in San Jose, California
  • Over 600 employees and contractors worldwide; over 77% in R&D
  • Over 300 completed ASIC designs, approaching half a billion units shipped
  • Custom IP in specialized, high-performance memory, I/O, SerDes and high-bandwidth memory (HBM), 16/14/7nm

* FinFET: State-of-the-art semiconductor 3D transistor technology
** ASICs: Application-specific integrated circuits — custom semiconductor chip for one customer