eSilicon to present: Enabling Technology for the Cloud and AI – One Size Fits All?
Design & Reuse IP SoC Day Santa Clara 2018
For release on March 28, 2018.
eSilicon, an independent provider of FinFET-class ASICs, custom IP and advanced 2.5D packaging solutions, will present Enabling Technology for the Cloud and AI – One Size Fits All? at Design & Reuse IP SoC Day Santa Clara on April 5, 2018.
AI and cloud/networking chips both have demanding performance and power requirements. In this presentation, we’ll examine the FinFET ASIC architecture, 2.5D packaging and critical IP blocks needed for these designs. We’ll also examine whether “one size fits all” IP can achieve the chips’ desired specifications in these demanding markets.
Lisa Minwell, senior director, IP marketing, strategy & products, eSilicon Corporation
April 5, 2018
Track: Enabling Technology for AI SoCs
Hyatt Regency, Santa Clara, California
About D&R IP SoC Day Santa Clara
Hear about trends in IP-based electronic systems as well as information about the most advanced offerings from specialists in the field including foundries, EDA vendors, IP providers, design houses and electronics system companies.
eSilicon is an independent provider of complex FinFET-class ASICs, custom IP and advanced 2.5D packaging solutions. Our ASIC+IP synergies include complete, 2.5D/HBM2 and TCAM platforms for FinFET technology at 16/14/7nm as well as SerDes, specialized memory compilers and I/O libraries. Supported by patented knowledge base and optimization technology, eSilicon delivers a transparent, collaborative, flexible customer experience to serve the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets.
Collaborate. Differentiate. Win.™
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