Multi-Port Memory & Asynchronous Register File

Multi-Port Memory Solutions

eSilicon has designed four-port register file memory compilers catering to multiple customers in the networking and communications domains. These memories have two write ports and two read ports, providing parallel memory access most suitable for compute-intensive applications that require extreme bandwidth capabilities.

The high-speed pseudo four-port and pseudo quad-port SRAM are new architectures introduced in 7nm to support parallel operations with significant area reduction. The P4P and PQP allows up to two and four simultaneous read or write operations respectively.

Features

  • Up to four independent read ports and two independent write ports
  • Supports parallel operations to increase system bandwidth
  • Zero clock latency overhead
  • Deterministic timing
  • Easily integrates on chip with existing design flows
  • High bandwidth with the best density and power savings for critical applications requiring multi-port architectures

Availability

eSilicon 14nm and 28nm four-port register files are available now. Front-end views of our 7nm multi-port memories are also available now. Silicon results and data sheets are available from sales@esilicon.com. Networking and communications customers have long relied on the performance of eSilicon’s high-speed register files to meet demanding bandwidth and speed requirements.

Asynchronous Register File

eSilicon has designed asynchronous register file memory compilers catering to multiple customers in the networking and communications domains. These memories have one synchronous write port and one asynchronous read port.

Features

  • Independent write port and independent asynchronous read port
  • Enables fast access times for downstream operation.

Availability

eSilicon 14nm and 28nm asynchronous register files are available now. Front-end views of our 7nm asynchronous register files are also available now. Silicon results and data sheets are available from sales@esilicon.com. eSilicon’s philosophy for developing memories is to customize the specialty register file memory compilers, such as four-port register files and asynchronous register files, to end-customer requirements. This usually involves turning multiple knobs to fine-tune the performance, power or area of register files to customer application requirements.

Detailed Information

Additional features and benefits for eSilicon’s  7nm IP platform are available under NDA. Contact sales@esilicon.com.

Online Access

All eSilicon IP is available in IP Navigator at https://star.esilicon.com, our online IP exploration tool. Navigator provides access to eSilicon’s full portfolio of IP products. Memory instances may be generated, analyzed and downloaded. Power, performance, and area (PPA) data is pre-loaded for easy data comparison and analysis.

Resources

Brochures:

  • 7FF IP platform for networking, high-performance computing, AI & 5G
  • 14LPP IP platform for networking, high-performance computing, AI & 5G