28nm Memory IP

It’s All About Power and Money: See How eSilicon Saves You Both at 28nm

eSilicon has developed customizable memories on multiple flavors of 28nm processes across multiple foundries. We have refined our IP to offer optimized power, performance and area (PPA) tradeoffs that enable our customers to remain on the 28nm node longer, rather than incur the expense of moving to the 14/16nm node.

Low-Power, High-Performance SRAMs

Wireless and handheld customers engage with eSilicon to develop low-power, high-performance SRAMs that can meet the long battery life requirements of wireless and handheld devices, while at the same time deliver the performance level required by state-of-the-art devices such as smart phones.

eSilicon’s philosophy for developing memories is to customize the memories to end-customer requirements. This usually involves turning multiple knobs to tune the area, power, and performance of SRAMs to meet application requirements. The chart below shows some of the elements that eSilicon has successfully used in the past to meet customer targets.

Customizable SRAM Elements

Area Performance Power Management Testability Functional Options
  • Aspect Ratio
  • Side Decode
  • Push-Rule Bit Cell
  • Low Vt for Highest Performance
  • Banking
  • Center Decode
  • Array Source Biasing
  • Periphery Shutdown
  • Complete Shutdown
  • Dual Rail
  • DVFS
  • Mixed Vt Periphery
  • High Vt Periphery
  • BIST Mux
  • Scan Flops
  • Synchronous Bypass
  • Read Stress
  • Write Stress
  • Column Redundancy
  • Row Redundancy
  • Bit Write
  • Pipelined Output

28nm TCAM with Advanced Power Management

eSilicon offers a customizable ternary content addressable memory (TCAM) in 28nm with advanced power management features that include partial-pipelined search and power-down. The CAMs can remove an entry or groups of entries from participating in the search to reduce dynamic power. This feature can be combined with multi-cycle searches to further reduce power. Periphery shutdown can provide another means of power reduction by powering down the periphery while maintaining the contents stored in the CAM array. CAMs have single-clock-cycle throughput for searching the entire array, making CAMs faster than other hardware/software-based search systems. CAMs are ideally suited for network applications such as routing, filtering, data compression, encryption and address lookups for packet switching.

Customizable TCAM Elements

Power Options Performance Area Yield Functional Options
  • Power Down
  • Pipelined Partial Evaluation
  • Periphery Shutdown
  • Low Vt Periphery Option for 850 MSPS
  • Auto Banking
  • Push-Rule Bit Cell 13% Smaller Than Logic Rule
  • Row / Column Redundancy
  • Priority Encoder
  • Multi-Width Search Mode
    • 512×144 (Single Word)
    • 2048×36 (Quarter Word)
    • 1024×72 (Half Word)
    • 256×288 (Double Word)

Customizable Memory IP From eSilicon

Our memories are optimized across the spectrum of performance, power, area, and yield to address customer-specific market requirements. eSilicon memories support industry-standard EDA flows. We work closely with our foundry and integrated device manufacturer (IDM) partners to incorporate the latest guidelines, including statistical analysis, design for manufacturability (DFM) rules, and redundancy guidelines. We collaborate with our customers to customize an already-developed memory compiler or instance and optimize the functionality, performance, power, area, or yield to match their SoC’s design-specific needs.

Proven 14/16nm Memory IP

If your product requires a move to 14/16nm, eSilicon has 14/16nm memory IP already available; the first test chip tapeout is complete.

More Information

Whether you plan to take advantage of the benefits of 28nm or move to 14/16nm, please contact us at ipbu@esilicon.com if you would like to learn more about our custom IP offering.

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