Brochures

Brochures

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FinFET ASIC Design & Manufacturing Services

eSilicon manages the design, development and manufacturing of highly complex FinFET ASICs for our customers. To meet the demands of building these monster ASICs, we have created a new model for taking our ASIC customers from RTL to volume production.


1.20 MB September 27, 2019
neuASIC 7nm Platform for Machine Learning ASIC Design

eSilicon’s neuASIC™ IP platform addresses the challenge of evolving algorithms through a portfolio of AI-specific IP and a modular design methodology that allows for easily adaptable ASICs that are extremely efficient in machine learning applications.


1.50 MB September 27, 2019
eSilicon’s Network-Optimized 7FF IP Platform

eSilicon’s 7nm IP platform delivers a complete ecosystem of networking-optimized IP with high configurability designed in. All IP in the platform is “plug and play,” using the same metal stack, reliability requirements, operating ranges, control interfaces and DFT methodology. This configurability and compatibility results in better performance, higher density and faster time to market.


1.21 MB September 27, 2019
56G Full-DSP Long-Reach SerDes on 7nm

eSilicon’s 7nm full-DSP long-reach SerDes technology delivers a new level of performance and versatility using a novel DSP-based architecture. Two 7nm PHYs support 58G and 112G NRZ/PAM4 operation to provide the best power efficiency for servers, switches and routers. The architecture delivers unprecedented power efficiency for a true long-reach capability, with hole-free operation down to 1Gb/s.


1,017.40 KB September 27, 2019
7nm High-Bandwidth Interconnect (HBI+) PHY for Die-to-Die Interconnects

eSilicon’s 7nm high-bandwidth interconnect (HBI+) PHY for die-to-die interconnects is a special-purpose hard IP block. It delivers a high-bandwidth, low-power, low-latency wide-parallel, clock-forwarded PHY interface for 2.5D applications including system-on-chip (SoC) to chiplets and SoC partitioning for complex subsystems. Silicon interposer and silicon bridge technologies are supported.


667.41 KB September 27, 2019
HBM2 PHY on 28/16/14/7nm for Samsung & TSMC; HBM2/HBM2E/LL HBM PHY on 7nm

eSilicon has a complete 2.5D/HBM2 (high-bandwidth memory) solution: 2.5D ecosystem management, HBM2 PHY, ASIC, interposer and package design through manufacturing. This brochure gives an overview of our HBM2 hardened PHY solutions on Samsung 14LPP, TSMC 7FF, TSMC 16FF+ and TSMC 28HPC. Contact sales@esilicon.com for our full HBM2 PHY data sheet.


460.01 KB September 27, 2019
TCAM: Embedded Ternary CAM Compilers to 7nm

eSilicon offers a broad range of silicon-proven, feature-rich, high-performance, high-density, power-optimized embedded 7nm-180nm binary and ternary CAM compilers. Our TCAM compilers provide high-efficiency, cost-effective solutions for applications such as network search engines, cache for network processors, QoS services, classifications, Ethernet, ATM switches and other diverse networking applications.


737.29 KB September 27, 2019
eSilicon’s Network-Optimized 14LPP IP Platform

eSilicon has complete physical IP and 2.5D/HBM2 (high-bandwidth memory) solutions on Samsung 14LPP technology, including high-performance, high-bandwidth network-optimized memory compilers, TCAM, HBM2 PHY and extended-voltage GPIO (EVGPIO).


655.22 KB September 27, 2019